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Volumn 14, Issue 2, 1995, Pages 173-185

Relaxation-Based Transient Sensitivity Computations for MOSFET Circuits

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CALCULATIONS; COMPUTATIONAL METHODS; COMPUTER SIMULATION; CONVERGENCE OF NUMERICAL METHODS; ELECTRIC NETWORK ANALYSIS; ITERATIVE METHODS; MATHEMATICAL MODELS; REDUNDANCY; SENSITIVITY ANALYSIS; WAVEFORM ANALYSIS;

EID: 0029255826     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.370426     Document Type: Article
Times cited : (18)

References (16)
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    • Director, S.W.1    Rohrer, R.A.2
  • 5
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    • The waveform relaxation method for time-domain analysis of large scale integrated circuits
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    • E. Lelarasmee, A. E. Ruehli, and A. L. Sangiovanni-Vincentelli, “The waveform relaxation method for time-domain analysis of large scale integrated circuits,” IEEE Trans. Computer-Aided Design, vol. CAD-1, pp. 131–145, Aug. 1982.
    • (1982) IEEE Trans. Computer-Aided Design , vol.CAD-1 , pp. 131-145
    • Lelarasmee, E.1    Ruehli, A.E.2    Sangiovanni-Vincentelli, A.L.3
  • 7
    • 0024936340 scopus 로고
    • The exploitation of latency and multirate behavior using nonlinear relaxation for circuit simulation
    • Dec.
    • R. A. Saleh and A. R. Newton, “The exploitation of latency and multirate behavior using nonlinear relaxation for circuit simulation,” IEEE Trans. Computer-Aided Design, vol. 8, pp. 1286–1298, Dec. 1989.
    • (1989) IEEE Trans. Computer-Aided Design , vol.8 , pp. 1286-1298
    • Saleh, R.A.1    Newton, A.R.2
  • 8
    • 0025494716 scopus 로고
    • Accelerating relaxation algorithms for circuit simulation using waveform-Newton and step-size refinement
    • Sept.
    • R. A. Saleh and J. K. White, “Accelerating relaxation algorithms for circuit simulation using waveform-Newton and step-size refinement,” IEEE Trans. Computer-Aided Design, vol. 9, no. 9, pp. 951–958, Sept. 1990.
    • (1990) IEEE Trans. Computer-Aided Design , vol.9 , Issue.9 , pp. 951-958
    • Saleh, R.A.1    White, J.K.2
  • 9
    • 0024888673 scopus 로고
    • SPECS simulation validation with efficient transient sensitivity computation
    • T. V. Nguyen, P. Feldmann, S. W. Director, and R. A. Rohrer, “SPECS simulation validation with efficient transient sensitivity computation,” in Proc. Int. Conf. CAD, 1989, pp. 252–255.
    • (1989) Proc. Int. Conf. CAD , pp. 252-255
    • Nguyen, T.V.1    Feldmann, P.2    Director, S.W.3    Rohrer, R.A.4
  • 12
    • 0023397547 scopus 로고
    • Sufficient conditions for multirate iterated timing analysis to converge
    • Aug.
    • K. Urahama, “Sufficient conditions for multirate iterated timing analysis to converge,” Trans. IEICE, vol. E70, no. 8, pp. 685–688, Aug. 1987.
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    • Urahama, K.1
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    • Transient sensitivity computation for waveform-relaxation-based timing simulation
    • C. J. Chen, J. M. Shyu, and W. S. Feng, “Transient sensitivity computation for waveform-relaxation-based timing simulation,” in Proc. Int. Conf. CAD, 1991, pp. 120–123.
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    • Chen, C.J.1    Shyu, J.M.2    Feng, W.S.3
  • 15
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    • SLATE: A circuit simulation program with latency exploitation and node tearing
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    • P. Yang, I. N. Hajj, and T. N. Trick, “SLATE: A circuit simulation program with latency exploitation and node tearing,” in Proc. IEEE Int. Conf. Circuits Computers, Oct. 1985.
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.