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Volumn 38, Issue , 1995, Pages 182-183
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300 MHz 64 b Quad-issue CMOS RISC microprocessor
a a a a a a a a a a a a a a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
BUFFER STORAGE;
CMOS INTEGRATED CIRCUITS;
COMPUTER ARCHITECTURE;
ELECTRONICS PACKAGING;
FLIP FLOP CIRCUITS;
GATES (TRANSISTOR);
LOGIC CIRCUITS;
VLSI CIRCUITS;
ALPHA ARCHITECTURE;
CLOCK SKEW;
DOMINO LOGIC;
DYNAMIC LEVEL SENSITIVE TRANSMISSION GATE LATCHES;
LOGIC DELAYS;
QUAD ISSUE CUSTOM VLSI IMPLEMENTATION;
MICROPROCESSOR CHIPS;
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EID: 0029255748
PISSN: 01936530
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (43)
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References (1)
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