Multilevel-cell 32 Mb flash memory

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 38, Issue , 1995, Pages

  Bauer, M ^a   Alexis, R ^a   Atwood, G ^a   Baltar, B ^a   Fazio, A ^a   Frary, K ^a   Hensel, M ^a   Ishac, M ^a   Javanifard, J ^a   Landgraf, M ^a   Leak, D ^a   Loe, K ^a   Mills, D ^a   Ruby, P ^a   Rozman, R ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; LOGIC DESIGN; MICROPROCESSOR CHIPS; THRESHOLD ELEMENTS; VOLTAGE CONTROL;

ERASE VERIFY CELL (EV); FLASH MEMORY; FLASH MEMORY STORING; MEMORY CELLS; MEMORY DENSITY; MEMORY STORAGE CAPACITY; MULTILEVEL CELL (MLC); THRESHOLD VOLTAGE;

DATA STORAGE EQUIPMENT;

EID: 0029253928     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)