A 12 Gb/s Si Bipolar 4:1-Multiplexer IC for SDH Systems

IEEE Journal of Solid-State Circuits

Volumn 30, Issue 2, 1995, Pages 129-132

  Lao, Zhihao H ^a   Langmann, Ulrich ^a   Albers, Jens N ^a   Schlag, Erwin ^b   Clawin, Detlef ^c  

^a RUHR UNIVERSITY BOCHUM   (Germany)

^b NOKIA RESEARCH CENTER   (United States)

^c MICRAM MICROELECTRONIC GMBH   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR INTEGRATED CIRCUITS; DIGITAL COMMUNICATION SYSTEMS; ELECTRIC DELAY LINES; ELECTRIC NETWORK SYNTHESIS; FLIP FLOP CIRCUITS; FREQUENCY DIVIDING CIRCUITS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUITS; PHASE CONTROL; SEMICONDUCTING SILICON;

MULTIPLEXER; PHASE CONTROL CIRCUIT; SILICON BIPOLAR TECHNOLOGY; SYNCHRONOUS DIGITAL HIERARCHY;

MULTIPLEXING EQUIPMENT;

EID: 0029247827     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.341739     Document Type: Article

References (5)

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5. V. D. Torre et al., “MOSAIC V—A very high performance bipolar technology,” IEEE 1991 Bipolar Circuits and Technol. Meeting, Conf. Proc., 1991, pp. 21-24.