VLSI Architectures for Video Compression—A Survey

Proceedings of the IEEE

Volumn 83, Issue 2, 1995, Pages 220-246

  Pirsch, Peter ^a   Gehrke, Winfried ^a   Demassieux, Nicolas ^b  

^a LEIBNIZ UNIVERSITY HANNOVER   (Germany)

^b TELECOM PARISTECH   (France)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTERS; IMAGE CODING; IMAGE PROCESSING; IMAGE QUALITY; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL TRANSFORMATIONS; MICROPROCESSOR CHIPS; SEMICONDUCTING SILICON; STANDARDIZATION; STANDARDS; VLSI CIRCUITS;

DISCRETE COSINE TRANSFORMS; FUNCTION SPECIFIC; PROGRAMMABLE ARCHITECTURES; PROGRAMMABLE VIDEO SIGNAL PROCESSORS; VLSI ARCHITECTURES;

IMAGE COMPRESSION;

EID: 0029244586     PISSN: 00189219     EISSN: 15582256     Source Type: Journal    
DOI: 10.1109/5.364465     Document Type: Article

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