CORDIC architectures with parallel compensation of the scale factor

Proceedings of the International Conference on Application Specific Array Processors

Volumn , Issue , 1995, Pages 258-269

  Villalba, J ^a   Hidalgo, J A ^a   Zapata, E L ^a   Antelo, E ^a   Bruguera, J D ^a  

^a UNIVERSITY OF MÁLAGA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; ITERATIVE METHODS; PARALLEL PROCESSING SYSTEMS; VECTORS;

CORDIC (COORDINATE ROTATION DIGITAL COMPUTER) ALGORITHM; SCALE FACTOR COMPENSATION; SYSTEM LATENCY;

COMPUTER SYSTEMS;

EID: 0029237140     PISSN: 10636862     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (17)