Minimizing the routing cost during logic extraction

Proceedings - Design Automation Conference

Volumn , Issue , 1995, Pages 70-75

  Vaishnav, Hirendu ^a   Pedram, Massoud ^a  

^a UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN ALGEBRA; BOOLEAN FUNCTIONS; COMPUTATIONAL COMPLEXITY; LOGIC CIRCUITS; LOGIC GATES; OPTIMIZATION;

LOGIC EXTRACTION; ROUTING COST FUNCTION;

LOGIC DESIGN;

EID: 0029225180     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/217474.217509     Document Type: Conference Paper

References (12)