Arithmetic built-in self test for high-level synthesis

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 1995, Pages 132-139

  Mukherjee, N ^a   Kassab, M ^a   Rajski, J ^a   Tyszer, J ^a  

^a MCGILL UNIVERSITY   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

ARITHMETIC BUILT IN SELF TEST; ARITHMETIC GENERATORS; COMPACTORS; HIGH LEVEL SYNTHESIS; TESTABILITY;

ADDERS; COMPUTER HARDWARE; CONTROLLABILITY; LOGIC DESIGN; MICROPROCESSOR CHIPS; OBSERVABILITY; SHIFT REGISTERS;

PRINTED CIRCUIT TESTING;

EID: 0029222760     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (17)