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Volumn 2, Issue , 1995, Pages 1137-1141
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Performance evaluation of buffered multistage interconnection networks with look-ahead contention resolution scheme
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Author keywords
[No Author keywords available]
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Indexed keywords
BUFFER CIRCUITS;
COMPUTATIONAL COMPLEXITY;
DIGITAL COMMUNICATION SYSTEMS;
MAXIMUM PRINCIPLE;
PACKET NETWORKS;
PARALLEL PROCESSING SYSTEMS;
PERFORMANCE;
QUEUEING THEORY;
BUFFER SWITCHES;
BUFFERED MULTISTAGE INTERCONNECTION NETWORKS;
HEAD OF LINE BLOCKING;
LOOK AHEAD CONTENTION RESOLUTION;
INTERCONNECTION NETWORKS;
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EID: 0029215199
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (2)
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References (7)
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