Novel pattern generator for near-perfect fault-coverage

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 1995, Pages 412-425

  Chatterjee, Mitrajit ^a   Pradhan, Dhiraj K ^a  

^a TEXAS A AND M UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

HARDWARE OVERHEAD; NEAR PERFECT FAULT COVERAGE; ON CHIP BUILT IN SELF TESTING; PATTERN GENERATOR; PSEUDO RANDOM PATTERN GENERATOR;

COMBINATORIAL CIRCUITS; COMPUTER HARDWARE; FAILURE ANALYSIS; LOGIC DESIGN; MATHEMATICAL MODELS; PROBABILITY;

INTEGRATED CIRCUIT TESTING;

EID: 0029213814     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (26)