Diagnosis of scan path failures

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 1995, Pages 250-255

  Edirisooriya, Samantha ^a   Edirisooriya, Geetani ^a  

^a MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMBINATIONAL LOGIC; EXCLUSIVE OR GATE; FAULTY CIRCUITS; SCAN CIRCUIT; SCAN PATH FAILURES;

COMBINATORIAL CIRCUITS; COMPUTER SIMULATION; ELECTRIC FAULT LOCATION; FAILURE ANALYSIS; LOGIC CIRCUITS; LOGIC GATES; MICROPROCESSOR CHIPS;

INTEGRATED CIRCUIT TESTING;

EID: 0029212989     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)