A Bootstrapped Bipolar CMOS (B2CMOS) Gate for Low-Voltage Applications

IEEE Journal of Solid-State Circuits

Volumn 30, Issue 1, 1995, Pages 47-53

  Embabi, Sherif H K ^a   Islam, Kazi ^a   Bellaouar, Abdellatif ^b  

^a TEXAS A AND M UNIVERSITY   (United States)

^b CENTRE DE DÉVELOPPEMENT DES TECHNOLOGIES AVANCÉES   (Algeria)

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR INTEGRATED CIRCUITS; COMPUTER SIMULATION; DELAY CIRCUITS; INTEGRATED CIRCUIT LAYOUT; LOGIC GATES;

BOOTSTRAPPED BIPOLAR CMOS; BOOTSTRAPPING; SOFTWARE PACKAGE HSPICE; TRANSIENT SATURATION TECHNIQUES;

CMOS INTEGRATED CIRCUITS;

EID: 0029209606     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.350195     Document Type: Article

References (6)

1. S. H. K. Embabi, A. Bellaouar, and M. I. Elmasry, Digital BiCMOS Integrated Circuit Design. New York: Academic, 1993.
2. H. J. Shin, “Performance comparison of driver configurations and full-swing techniques for BiCMOS logic circuits,” IEEE J. Solid-State Circuits, vol. 25, no. 3, pp. 863–865, June 1990.
3. A. E. Gamal et al., “BiNMOS a basic cell for BiCMOS logic circuits,” in Proc. CICC 1989, May 1989, pp. 8. 3.1–8.3.4.
4. S. H. K. Embabi, A. Bellaouar, M. I. Elmasry, and R. A. Hadaway, “New full-voltage-swing BiCMOS buffer,” IEEE J. Solid-State Circuits, vol. 26, no. 2, pp. 150–153, Feb. 1994.
5. M. Hiraki et al., “A 1.5 V full-swing BiCMOS logic circuit,” IEEE J. Solid-State Circuits, vol. 27, no. 11, pp. 1568–1574, Nov. 1992.
6. R. Y. V. Chik and C. A. T. Salama, “1.5 V bootstrapped BiCMOS logic gate,” Electron. Lett., vol. 29, no. 3, pp. 307–309, Feb. 1993.