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Volumn 7, Issue 1, 1995, Pages 11-19
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Bandwidth optimization of a low power, high speed CMOS current op amp
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Author keywords
[No Author keywords available]
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Indexed keywords
BANDWIDTH;
CMOS INTEGRATED CIRCUITS;
COMPUTER SIMULATION;
ELECTRIC CURRENTS;
ELECTRIC NETWORK ANALYSIS;
GAIN MEASUREMENT;
INTEGRATED CIRCUIT LAYOUT;
OPTIMIZATION;
BASIC CONFIGURATION;
DIFFERENTIAL FLOATING CURRENT SOURCE;
DIFFERENTIAL OUTPUT;
DOMINANT POLE;
FUNDAMENTAL EQUATIONS;
HIGH OPEN LOOP GAIN;
OUTPUT STAGE;
SINGLE ENDED INPUT;
SINGLE SECOND GENERATION CURRENT CONVEYOR;
TEST CIRCUITS;
OPERATIONAL AMPLIFIERS;
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EID: 0029208384
PISSN: 09251030
EISSN: 15731979
Source Type: Journal
DOI: 10.1007/BF01256443 Document Type: Article |
Times cited : (25)
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References (10)
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