Hardware implementation of new analog memory for neural networks

IEICE Transactions on Electronics

Volumn E78-C, Issue 1, 1995, Pages 101-105

  Nakajima, Koji ^a   Sato, Shigeo ^a   Kitaura, Tomoyasu ^a   Murota, Junichi ^a   Sawada, Yasuji ^a  

^a TOHOKU UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

EQUIVALENT CIRCUITS; FEEDBACK; INTEGRATED OPTOELECTRONICS; LINEAR INTEGRATED CIRCUITS; LOGIC GATES; MICROPROCESSOR CHIPS; MOSFET DEVICES; NEURAL NETWORKS; SEMICONDUCTOR DEVICE MODELS; THIN FILM DEVICES; TUNNEL JUNCTIONS;

ANALOG MEMORY; FLOATING GATE; NEUROCHIP; SWITCHED DIFFUSION MEMORY;

SEMICONDUCTOR STORAGE;

EID: 0029197432     PISSN: 09168524     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (6)