Electrical Characteristics of Scaled CMOSFET's with Source/Drain Regions Fabricated by 7° and 0° Tilt-Angle Implantations

IEEE Transactions on Electron Devices

Volumn 42, Issue 1, 1995, Pages 70-77

  Ohzone, Takashi ^a   Yamamoto, Mariko ^a   Iwata, Hideyuki ^a   Odanaka, Shinji ^b  

^a TOYAMA PREFECTURAL UNIVERSITY   (Japan)

^b PANASONIC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CALCULATIONS; CMOS INTEGRATED CIRCUITS; ELECTRIC CURRENTS; ELECTRIC PROPERTIES; ELECTRIC VARIABLES MEASUREMENT; ELECTRODES; GATES (TRANSISTOR); ION IMPLANTATION; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR JUNCTIONS;

BIAS VOLTAGE DEPENDENCE; CHANNEL WIDTH; CHANNELING IONS; IMPURITY PROFILES; PHOSPHOROUS IMPLANTATION; PUNCHTHROUGH CURRENT; SCALED CMOSFET; SUBSTRATE CURRENTS; SUBTHRESHOLD SWING; THRESHOLD VOLTAGE;

MOSFET DEVICES;

EID: 0029196675     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/16.370033     Document Type: Article

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