Simultaneous multithreading: maximizing on-chip parallelism

ACM SIGARCH (Association for Computing Nachinery Special Interest Group on Computer Architecture) - Conference Proceedings

Volumn , Issue , 1995, Pages 392-403

  Tullsen, Dean M ^a   Eggers, Susan J ^a   Levy, Henry M ^a  

^a UNIVERSITY OF WASHINGTON   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; COMPUTER ARCHITECTURE; HIERARCHICAL SYSTEMS; LARGE SCALE SYSTEMS; MAXIMUM PRINCIPLE; MODELS; PARALLEL PROCESSING SYSTEMS; PERFORMANCE;

CACHE CONFIGURATION EVALUATION; MAXIMIZING ON-CHIP PARALLELISM; SIMULTANEOUS MULTITHREADING; SUPERSCALAR ARCHITECTURE;

MICROPROCESSOR CHIPS;

EID: 0029183524     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (34)