Feedback control circuit design technique to suppress power noise in high speed output driver

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 1, Issue , 1995, Pages 307-310

  Choy, C S ^a   Chan, C F ^a   Ku, M H ^a  

^a CHINESE UNIVERSITY OF HONG KONG   (Hong Kong)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER CIRCUITS; CMOS INTEGRATED CIRCUITS; FEEDBACK CONTROL; FIELD EFFECT TRANSISTORS; INTERFERENCE SUPPRESSION; SHORT CIRCUIT CURRENTS;

EXTERNAL INDUCTANCE; FEEDBACK CONTROL CIRCUIT DESIGN; FEEDBACK CONTROL SLEW RATE OUTPUT DRIVER; HIGH SPEED OUTPUT DRIVER; POWER NOISE SUPPRESSION; PROPAGATION DELAY; RISE/FALL TIME;

SWITCHING CIRCUITS;

EID: 0029182063     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)