Simultaneous depth and area minimization in LUT-based FPGA mapping

ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA

Volumn , Issue , 1995, Pages 68-74

  Cong, Jason ^a   Hwang, Yean Yow ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CALCULATIONS; COMPUTER PROGRAMMING LANGUAGES; COSTS; MATHEMATICAL TECHNIQUES; OPTIMIZATION; PERFORMANCE; TABLE LOOKUP;

DEPTH/AREA MINIMIZATION; FIELD PROGRAMMABLE GATE ARRAYS; FLOWMAP ALGORITHMS; LOGIC SYNTHESIS BENCHMARKS;

LOGIC CIRCUITS;

EID: 0029181664     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/201310.201322     Document Type: Conference Paper

References (15)