High-level estimation of high-performance architectures for Reed-Solomon decoding

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 1, Issue , 1995, Pages 720-723

  Jeong, Yongjin ^a   Burleson, Wayne ^a  

^a UNIVERSITY OF MASSACHUSETTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CODES (SYMBOLS); COMPUTATIONAL METHODS; COMPUTER HARDWARE; COMPUTER SYSTEMS; ERROR CORRECTION; ERROR DETECTION; ESTIMATION; PERFORMANCE; RELIABILITY;

COMPUTATIONAL STRUCTURE; DECODER; FINITE FIELD ARITHMETIC; REED SOLOMON DECODING;

DECODING;

EID: 0029180158     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)