4 × 4 × 2 neural network design using modular neural chips with on-chip learning

IEEE International Conference on Neural Networks - Conference Proceedings

Volumn 4, Issue , 1994, Pages 2070-2073

  Oh, Hwa Joon ^a   Salam, Fathi M A ^a  

^a MICHIGAN STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ERROR ANALYSIS; ERRORS; LEARNING SYSTEMS; NONLINEAR EQUATIONS; SYSTEMS ANALYSIS;

CONTINUOUS TIME GRADIENTDESCENT DYNAMIC UPDATE LAW; MODULAR NEURAL CHIPS; NEURONS; SIGMOLD FUNCTION; SYNAPSE FUNCTION;

NEURAL NETWORKS;

EID: 0028757265     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)