FPGA synthesis using function decomposition

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 1994, Pages 30-35

  Lai, Yung Te ^a   Pan, Kuo Rueih Ricky ^a   Pedram, Massoud ^a  

^a UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BOOLEAN FUNCTIONS; FUNCTION EVALUATION; LOGIC CIRCUITS; LOGIC GATES; TABLE LOOKUP;

FIELD PROGRAMMABLE GATE ARRAYS; FUNCTION DECOMPOSITION; MULTIPLE OUTPUT FUNCTIONS;

ELECTRIC NETWORK SYNTHESIS;

EID: 0028754255     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (18)