Impact of boron diffusion through O2 and N2O gate dielectrics on the process margin of dual-poly low power CMOS

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 1994, Pages 325-328

  Krisch, K S ^a   Manchanda, L ^a   Baumann, F H ^a   Green, M L ^a   Brasen, D ^a   Feldman, L C ^a   Ourmazd, A ^a  

^a LUCENT TECHNOLOGIES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; DIELECTRIC MATERIALS; GATES (TRANSISTOR); MOS DEVICES; SEMICONDUCTING BORON; SEMICONDUCTOR DEVICE MODELS; THERMAL DIFFUSION;

BORON PENETRATION; POLYSILICON PROCESS MARGIN; RESULTANT OFF STATE POWER CONSUMPTION; SUBTHRESHOLD LEAKAGE CURRENT;

CMOS INTEGRATED CIRCUITS;

EID: 0028746288     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)