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Volumn , Issue , 1994, Pages 302-305
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New asynchronous multiplier using enable/disable CMOS differential logic
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Author keywords
[No Author keywords available]
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Indexed keywords
ASYNCHRONOUS SEQUENTIAL LOGIC;
CMOS INTEGRATED CIRCUITS;
COMPUTER SIMULATION;
INTEGRATED CIRCUIT LAYOUT;
LOGIC DESIGN;
LOGIC GATES;
PIPELINE PROCESSING SYSTEMS;
SEMICONDUCTOR DEVICE MODELS;
SEMICONDUCTOR STORAGE;
TIMING CIRCUITS;
VLSI CIRCUITS;
ENABLE/DISABLE CMOS DIFFERENTIAL LOGIC;
PIPELINED SERIAL-PARALLEL MULTIPLIER;
SOFTWARE PACKAGE HSPICE;
SOFTWARE PACKAGE MAGIC;
MULTIPLYING CIRCUITS;
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EID: 0028745454
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (3)
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References (6)
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