Nitrogen in-situ doped poly buffer LOCOS: Simple and scalable isolation technology for deep-submicron silicon devices

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 1994, Pages 683-686

  Kobayashi, T ^a   Nakayama, S ^a   Miyake, M ^a   Okazaki, Y ^a  

^a NTT CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT MANUFACTURE; LITHOGRAPHY; LSI CIRCUITS; MORPHOLOGY; OXIDATION; SEMICONDUCTING SILICON; SEMICONDUCTOR DOPING;

LOCAL OXIDATION OF SILICON (LOCOS); POLY BUFFERED LOCOS (PBL);

SILICON ON INSULATOR TECHNOLOGY;

EID: 0028744296     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)