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Volumn , Issue , 1994, Pages 44-53
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Characterizing speed-independence of high-level designs
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Author keywords
[No Author keywords available]
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Indexed keywords
BOOLEAN FUNCTIONS;
COUNTING CIRCUITS;
CRITICAL PATH ANALYSIS;
DATA REDUCTION;
ELECTRIC NETWORK ANALYSIS;
INTEGRATED CIRCUIT LAYOUT;
LOGIC DESIGN;
LOGIC GATES;
MATHEMATICAL MODELS;
RANDOM ACCESS STORAGE;
RESPONSE TIME (COMPUTER SYSTEMS);
SHIFT REGISTERS;
PERSISTENCY;
SPEED INDEPENDENCE;
ASYNCHRONOUS SEQUENTIAL LOGIC;
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EID: 0028743755
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
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Times cited : (5)
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References (14)
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