A Room Temperature 0.1 µm CMOS on SOI

IEEE Transactions on Electron Devices

Volumn 41, Issue 12, 1994, Pages 2405-2412

  Shahidi, Ghavam G ^a   Anderson, Carl A ^a   Chappell, Barbara A ^a   Chappell, Terry I ^a   Comfort, James H ^a   Davari, Bijan ^a   Dennard, Robert H ^a   Franch, Robert L ^a   Polcari, Michael R ^a   McFarland, Patricia A ^a   Neely, James S ^a   Ning, Tak H ^a   Warnock, James D ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

PRODUCT DESIGN; RANDOM ACCESS STORAGE; SEMICONDUCTOR DEVICE STRUCTURES; SEMICONDUCTOR DOPING; SILICON ON INSULATOR TECHNOLOGY; TEMPERATURE; THERMAL EFFECTS;

FLOATING BODY EFFECTS; ROOM TEMPERATURE; SHORT CHANNEL EFFECTS; SOURCE DRAIN EXTENSION HALO;

CMOS INTEGRATED CIRCUITS;

EID: 0028743284     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/16.337456     Document Type: Article

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