0.05 μm-CMOS with ultra shallow source/drain junctions fabricated by 5 KeV ion implantation and rapid thermal annealing

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 1994, Pages 485-488

  Hori, Atsushi ^a   Nakaoka, Hiroaki ^a   Umimoto, Hiroyuki ^a   Yamashita, Kyoji ^a   Takase, Michihiko ^a   Shimizu, Norisato ^a   Mizuno, Bunji ^a   Odanaka, Shinji ^a  

^a PANASONIC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ANNEALING; FABRICATION; ION IMPLANTATION; LSI CIRCUITS; MOSFET DEVICES; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR JUNCTIONS; VOLTAGE CONTROL;

ULTRA SHALLOW SOURCE/DRAIN JUNCTIONS;

CMOS INTEGRATED CIRCUITS;

EID: 0028736932     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)