Low-power digital design

IEEE Symposium on Low Power Electronics

Volumn , Issue , 1994, Pages 8-11

  Horowitz, Mark ^a   Indermaur, Thomas ^a   Gonzalez, Ricardo ^a  

^a STANFORD UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC LOSSES; ELECTRIC NETWORK SYNTHESIS; INTEGRATED CIRCUIT LAYOUT; MICROPROCESSOR CHIPS; OPTIMIZATION;

ENERGY DELAY METRIC; LOW POWER DIGITAL DESIGN;

CMOS INTEGRATED CIRCUITS;

EID: 0028736474     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)