1-V low-power high-performance 32-bit conditional sum adder

IEEE Symposium on Low Power Electronics

Volumn , Issue , 1994, Pages 66-67

  Abu Khater, I S ^a   Yan, R H ^a   Bellaouar, A ^a   Elmasry, M I ^a  

^a LUCENT TECHNOLOGIES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC LOSSES; ELECTRIC NETWORK SYNTHESIS; INTEGRATED CIRCUIT LAYOUT;

CIRCUIT ARCHITECTURE; ONE VOLT DESIGN; TRANSISTOR ONLY SIMULATIONS;

ADDERS;

EID: 0028736118     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)