Power supply ramping and current measurement based technique for analog fault diagnosis

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 1994, Pages 234-239

  Somayajula, Shyam S ^a   Sanchez Sinencio, Edgar ^a   de Gyvez, Jose Pineda ^a  

^a TEXAS A AND M UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC CURRENT MEASUREMENT; ELECTRIC FAULT CURRENTS; ELECTRIC FAULT LOCATION; ELECTRIC NETWORK ANALYSIS; LINEAR INTEGRATED CIRCUITS; MATHEMATICAL MODELS; NEURAL NETWORKS; OPERATIONAL AMPLIFIERS;

ANALOG FAULT DIAGNOSIS; POWER SUPPLY RAMPING;

INTEGRATED CIRCUIT TESTING;

EID: 0028735172     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (13)