Efficient implementation of retiming

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn , Issue , 1994, Pages 226-233

  Shenoy, Narendra ^a   Rudell, Richard ^a  

^a SYNOPSYS INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; ELECTRIC NETWORK ANALYSIS; LOGIC DESIGN; SHIFT REGISTERS;

CONSTRAINED MIN-AREA RETIMING; RETIMING;

SEQUENTIAL CIRCUITS;

EID: 0028727025     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (10)