General state graph transformation framework for asynchronous synthesis

European Design Automation Conference - Proceedings

Volumn , Issue , 1994, Pages 448-453

  Lin, Bill ^a   Ykman Couvreur, Chantal ^a   Vanbekbergen, Peter ^a  

^a IMEC   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN FUNCTIONS; ELECTRIC NETWORK SYNTHESIS; GRAPHIC METHODS; INTEGRATED CIRCUIT LAYOUT; LOGIC DESIGN; OPTIMIZATION; STATE ASSIGNMENT;

ASYNCHRONOUS CONTROL CIRCUITS; CONCURRENCY REDUCTION; STATE GRAPH TRANSFORMATION; STATE SIGNAL INSERTION;

COMPUTER CIRCUITS;

EID: 0028726808     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)