Clock period constrained minimal buffer insertion in clock trees

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn , Issue , 1994, Pages 219-223

  Tellez, Gustavo E ^a   Sarrafzadeh, Majid ^a  

^a NORTHWESTERN UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BUFFER STORAGE; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; CONSTRAINT THEORY; ELECTRIC NETWORK PARAMETERS; ELECTRIC WAVEFORMS;

CLOCK RISE TIME; CLOCK TREES; MINIMAL BUFFER INSERTION;

BUFFER CIRCUITS;

EID: 0028724618     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (6)