Cell-based power estimation in CMOS combinational circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn , Issue , 1994, Pages 304-309

  Lin, Jiing Yuan ^a   Liu, Tai Chien ^a   Shen, Wen Zen ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ENERGY DISSIPATION; ENERGY UTILIZATION; ESTIMATION; GRAPH THEORY; LOGIC GATES; PROBABILITY; RESPONSE TIME (COMPUTER SYSTEMS);

CAPACITANCE FEED THROUGH EFFECT; CELL BASED POWER ESTIMATION; STATE TRANSITION GRAPH;

COMBINATORIAL CIRCUITS;

EID: 0028714501     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (8)