RISA: accurate and efficient placement routability modeling

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn , Issue , 1994, Pages 690-695

  Cheng, Chih liang Eric ^a  

^a CADENCE DESIGN SYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; ARRAYS; COSTS; MATHEMATICAL MODELS; SIMULATED ANNEALING;

COST FUNCTION; NET LIST SYNTHESIS TOOLS; PLACEMENT ROUTABILITY MODELING; ROUTABILITY; ROUTING CONGESTION;

INTEGRATED CIRCUIT LAYOUT;

EID: 0028699832     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (15)