Testing redundant asynchronous circuits by variable phase splitting

European Design Automation Conference - Proceedings

Volumn , Issue , 1994, Pages 328-333

  Lavagno, Luciano ^a   Kishinevsky, Michael ^a   Lioy, Antonio ^a  

^a POLITECNICO DI TORINO   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ASYNCHRONOUS SEQUENTIAL LOGIC; COMPUTATIONAL COMPLEXITY; ELECTRIC NETWORK SYNTHESIS; FORMAL LOGIC; HEURISTIC METHODS; INTEGRATED CIRCUIT TESTING; LOGIC DESIGN; PHASE CONTROL; REDUNDANCY;

ASYNCHRONOUS CIRCUITS; SINGLE CUBE CONTAINMENT; TESTABILITY; VARIABLE PHASE SPLITTING;

LOGIC CIRCUITS;

EID: 0028697032     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (16)