256 M DRAM with simplified register control for low power self refresh and rapid burn-in

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 1994, Pages 85-86

  Yoo, Seung Moon ^a   Han, Jin Man ^a   Haq, Ejaz ^a   Yoon, Sei Seung ^a   Jeong, Se Jin ^a   Kim, Byung Chul ^a   Lee, Jung Hwa ^a   Jang, Tae Seong ^a   Kim, Hyung Dong ^a   Park, Chan Jong ^a   Seo, Dong Il ^a   Choi, Chang Sik ^a   Cho, Soo In ^a   Hwang, Chang Gyu ^a  

^a SAMSUNG Electronics   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DATA PROCESSING; DATA STORAGE EQUIPMENT; HIERARCHICAL SYSTEMS; INPUT OUTPUT PROGRAMS; REDUNDANCY; SHIFT REGISTERS; STORAGE ALLOCATION (COMPUTER);

DYNAMIC RANDOM ACCESS MEMORY (DRAM); SELF REFRESH AND RAPID BURN IN SCHEME; SIMPLIFIED REGISTER CONTROL;

RANDOM ACCESS STORAGE;

EID: 0028602975     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)