Acyclic multi-way partitioning of Boolean networks

Proceedings - Design Automation Conference

Volumn , Issue , 1994, Pages 670-675

  Cong, Jason ^a   Li, Zheng ^a   Bagrodia, Rajive ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BOOLEAN FUNCTIONS; COMBINATORIAL CIRCUITS; COMPUTER SIMULATION; CONSTRAINT THEORY; GRAPH THEORY; INTEGRATED CIRCUIT LAYOUT; ITERATIVE METHODS; MICROPROCESSOR CHIPS; OPTIMIZATION;

ACYCLIC MULTIWAY PARTITIONING; BOOLEAN NETWORKS; MAXIMUM FANOUT FREE CONE; PARALLEL CIRCUIT SIMULATION;

VLSI CIRCUITS;

EID: 0028594898     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/196244.196609     Document Type: Conference Paper

References (22)