Ultrafast low-power operation of p+-n+ double-gate SOI MOSFETs

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 1994, Pages 11-12

  Tanaka, Tetsu ^a   Suzuki, Kunihiro ^a   Horie, Hiroshi ^a   Sugii, Toshihiro ^a  

^a FUJITSU LABORATORIES LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; DELAY CIRCUITS; ELECTRIC CURRENTS; ELECTRIC NETWORK PARAMETERS; ELECTRIC RESISTANCE; EQUIVALENT CIRCUITS; GATES (TRANSISTOR); OSCILLATORS (ELECTRONIC); SILICON ON INSULATOR TECHNOLOGY; VOLTAGE CONTROL;

ASPECT RATIO; DRAIN CURRENT; RING OSCILLATOR GATE DELAY; SILICON WAFERS; ULTRAFAST LOW POWER OPERATION;

MOSFET DEVICES;

EID: 0028583847     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)