Data path array with shared memory as core of a high performance DSP

Proceedings of the International Conference on Application Specific Array Processors

Volumn , Issue , 1994, Pages 271-282

  Kneip, J ^a   Roenner, K ^a   Pirsch, P ^a  

^a LEIBNIZ UNIVERSITY HANNOVER   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ARRAYS; COMPUTER ARCHITECTURE; COMPUTER SIMULATION; DATA PROCESSING; DATA TRANSFER; MATHEMATICAL TRANSFORMATIONS; PERFORMANCE; RANDOM PROCESSES; REDUCED INSTRUCTION SET COMPUTING; STORAGE ALLOCATION (COMPUTER);

DATA PATH ARRAY; DISTRIBUTED LOCAL CACHE MEMORY; HIGH PERFORMANCE DIGITAL SIGNAL PROCESSING; SHARED MEMORY;

DIGITAL SIGNAL PROCESSING;

EID: 0028573154     PISSN: 10636862     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)