High speed sub-halfmicron flash memory technology with simple stacked gate structure cell

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 1994, Pages 53-54

  Mori, Seiichi ^a   Sakagami, Eiji ^a   Yamaguchi, Yoshiko ^a   Kamiya, Eiji ^a   Tanimoto, Masao ^a   Tsunoda, Hiroaki ^a   Hisatomi, Kiyoshi ^a   Egawa, Hidemitsu ^a   Arai, Norihisa ^a   Hiura, Yohei ^a   Yoshikawa, Kuniyoshi ^a   Hashimoto, Kazuhiko ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CHEMICAL VAPOR DEPOSITION; GATES (TRANSISTOR); ION IMPLANTATION; MOSFET DEVICES; PERFORMANCE; SCANNING ELECTRON MICROSCOPY; SUBSTRATES;

FLASH MEMORY TECHNOLOGY; PUNCHTHROUGH; SCALABILITY; SELF ALIGNED SOURCE PROCESS; THRESHOLD VOLTAGE;

CELLULAR ARRAYS;

EID: 0028571337     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)