Graph-theoretic approach to clock skew optimization

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 1, Issue , 1994, Pages 407-410

  Deokar, Rahul B ^a   Sapatnekar, Sachin S ^a  

^a IOWA STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; FLIP FLOP CIRCUITS; GRAPHIC METHODS; LINEAR PROGRAMMING; NETWORKS (CIRCUITS); OPTIMIZATION; POLYNOMIALS; STANDARDS; VLSI CIRCUITS;

BENCHMARK CIRCUITS; CLOCK SKEW OPTIMIZATION; GRAPH BASED SOLUTION;

INTEGRATED CIRCUIT LAYOUT;

EID: 0028571323     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)