Four-quadrant CMOS/BiCMOS multipliers using linear - region MOS transistors

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 5, Issue , 1994, Pages 273-276

  Abel, Christopher ^a   Sakurai, Satoshi ^a   Larsen, Frode ^a   Ismail, Mohammed ^a  

^a OHIO STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR TRANSISTORS; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC CURRENT CONTROL; ELECTRON TRANSPORT PROPERTIES; IMPEDANCE MATCHING (ELECTRIC); LINEAR NETWORK ANALYSIS; MOS DEVICES; SENSITIVITY ANALYSIS; SIGNAL DISTORTION; VOLTAGE CONTROL;

FOUR QUADRANT MULTIPLIERS; SOFTWARE PACKAGE SPICE; TRANSCONDUCTORS;

MULTIPLYING CIRCUITS;

EID: 0028570266     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)