Minimization of memory traffic in high-level synthesis

Proceedings - Design Automation Conference

Volumn , Issue , 1994, Pages 149-154

  Kolson, David J ^a   Nicolau, Alexandru ^a   Dutt, Nikil ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CODES (SYMBOLS); COMPUTER SIMULATION; COMPUTER SOFTWARE; CRITICAL PATH ANALYSIS; GRAPH THEORY; HIGH LEVEL LANGUAGES; ITERATIVE METHODS; OPTIMIZATION; PERFORMANCE; REDUNDANCY; SCHEDULING; TELECOMMUNICATION TRAFFIC;

BENCHMARKS; CONTROL DATA FLOW GRAPH; HIGH LEVEL SYNTHESIS; MEMORY ACCESS; PERCOLATION BASED SCHEDULER;

DATA STORAGE EQUIPMENT;

EID: 0028565177     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/196244.196316     Document Type: Conference Paper

References (20)