Approach for UIO generation for FSM verification and validation

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 4, Issue , 1994, Pages 303-306

  Schin, D ^a   Shen, Y N ^a   Lombardi, F ^a  

^a TEXAS A AND M UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; DATA STRUCTURES; NETWORK PROTOCOLS; RESPONSE TIME (COMPUTER SYSTEMS); STANDARDS; STATE ASSIGNMENT; STORAGE ALLOCATION (COMPUTER); TREES (MATHEMATICS);

CONFORMANCE TESTING; FINITE STATE MACHINE; MEMORY SPACE; STATE TRANSITION GRAPH; UNIQUE INPUT/OUTPUT GENERATION;

FINITE AUTOMATA;

EID: 0028561676     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)