Vertical Φ -shape transistor (V Φ T) cell for 1Gbit DRAM and beyond

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 1994, Pages 133-134

  Maeda, S ^a   Maegawa, S ^a   Ipposhi, T ^a   Nishimura, H ^a   Kuriyama, H ^a   Tanina, O ^a   Inoue, Y ^a   Nishimura, T ^a   Tsubouchi, N ^a  

^a MITSUBISHI ELECTRIC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; COSTS; ELECTRIC PROPERTIES; ELECTRODES; EPITAXIAL GROWTH; FABRICATION; GATES (TRANSISTOR); MOSFET DEVICES; PERFORMANCE; RANDOM ACCESS STORAGE; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE STRUCTURES;

DYNAMIC RANDOM ACCESS MEMORY; POLY SILICON CHANNEL; PROCESS SIMPLIFICATION; SWITCHING TRANSISTOR;

TRANSISTORS;

EID: 0028554116     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)