Closing the Gap: Near-Optimal Steiner Trees in Polynomial Time

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 13, Issue 11, 1994, Pages 1351-1365

  Griffith, Jeff ^a   Robins, Gabriel ^b   Zhang, Tongtong ^b   Salowe, Jeffrey S ^c  

^a University of Tennessee   (United States)

^b UNIVERSITY OF VIRGINIA   (United States)

^c Questech Inc ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; COSTS; ELECTRIC NETWORK TOPOLOGY; HEURISTIC METHODS; ITERATIVE METHODS; MULTIPROCESSING SYSTEMS; POLYNOMIALS; SET THEORY; TREES (MATHEMATICS);

GLOBAL ROUTING; MINIMUM RECTILINEAR STEINER TREE; MINIMUM SPANNING TREE; SPEED UP FACTORS; UPPER BOUNDS; WIRING ESTIMATION;

CIRCUIT THEORY;

EID: 0028532894     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.329264     Document Type: Article

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