Optimizing Pipelined Networks of Associative and Commutative Operators

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 13, Issue 11, 1994, Pages 1418-1425

  Hartley, Richard ^a   Casavant, Albert E ^b  

^a GE GLOBAL RESEARCH   (United States)

^b NEC LABORATORIES AMERICA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; ALGORITHMS; COMBINATORIAL CIRCUITS; COMPUTER NETWORKS; CONSTRAINT THEORY; DATA COMMUNICATION SYSTEMS; ERROR ANALYSIS; ITERATIVE METHODS; MULTIPLYING CIRCUITS; PIPELINE PROCESSING SYSTEMS; SCHEDULING; TREES (MATHEMATICS);

ASSOCIATIVE OPERATORS; BIT/DIGITAL SERIAL COMPUTATION; COMMUTATIVE OPERATORS; LATENCY; PIPELINED NETWORKS; SCHEDULING CONSTRAINTS; SIGNAL PROPAGATION DELAY; SYNCHRONOUS DATA FLOW ARCHITECTURE; TREE HEIGHT MINIMIZATION;

COMPUTER CIRCUITS;

EID: 0028532666     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.329271     Document Type: Article

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