A Current Memory Cell with Switch Feedthrough Reduction by Error Feedback

IEEE Journal of Solid-State Circuits

Volumn 29, Issue 10, 1994, Pages 1288-1290

  Pain, Bedabrata ^a   Fossum, Eric R ^a  

^a CALIFORNIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ARRAYS; CAPACITANCE; CAPACITORS; ELECTRIC CURRENTS; ELECTRIC IMPEDANCE; ERROR CORRECTION; MESFET DEVICES; READOUT SYSTEMS; SCHEMATIC DIAGRAMS; SIGNAL PROCESSING; SPURIOUS SIGNAL NOISE;

CURRENT MEMORY ARRAYS; CURRENT MEMORY CELL; FEEDBACK COMPENSATION; INFRARED FOCAL PLANE READOUTS; SWITCH FEEDTHROUGH REDUCTION;

SWITCHING CIRCUITS;

EID: 0028517332     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.315216     Document Type: Article

References (9)

1. D. Vallancourt and S. J. Daubert, “Applications of current-copier circuits,” in Analogue IC Design: The Current-Mode Approach. C. Toumazou, zou, F. Lidgey and D. J. Haigh, Eds. London: Peregrinus, 1990, pp. 515–534.
2. T. Fiez, G. Liang, and D. J. Allstot, “Switched-current design issues,” IEEE J. Solid-State Circuits, vol. 26, no. 3, pp. 192–202, 1991.
3. G. Wegmann and E. A. Vittoz, “Analysis and improvements of accurate dynamic current mirrors,” IEEE J. Solid-State Circuits, vol. 25, no. 3, pp. 699–705, 1990.
4. B. Pain, S. K. Mendis, R. C. Schober, R. H. Nixon and E. R. Fossum, “Low power, low noise analog circuits for on-focal-plane signal processing of infrared sensors,” in Proc. SPIE, 1993, vol. 1946, Aerospace and Remote Sensing Infrared Detectors and Instrumentation, pp. 365–376.
5. C. Eigenberger and W. Guggenbuhl, “Dummy transistor compensation of analog MOS switches,” IEEE J. Solid-State Circuits, vol. 24, no. 4, pp. 1143–1146, 1989.
6. J. H. Shieh, M. Patil, and B. J. Sheu, “Measurement and analysis of charge injection in MOS analog switches,” IEEE J. Solid-State Circuits, vol. 22, no. 2, 277–281, 1987.
7. H. Lie, “Switched capacitor feedback sample-and-hold circuit,” U.S. Patent 4585956, 1986.
8. C. Toumazou, N. C. Battersby, and C. Maglaras, “High-performance algorithmic switched-current memory cell,” Electron. Lett., vol. 26, no. 19, pp. 1593–1595, 1990.
9. S. J. Daubert and D. Vallancourt, “Operation and analysis of current copier circuits,” in Proc. IEE, 1990, pt. G, vol. 137, no. 2, pp. 109–115.