Residue Multipliers Using Factored Decomposition

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 41, Issue 9, 1994, Pages 623-627

  Dugdale, Melanie ^a  

^a UNIVERSITY OF NEW SOUTH WALES   (Australia)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATION THEORY; DIFFERENTIATION (CALCULUS); DIGITAL ARITHMETIC; MATHEMATICAL MODELS; NUMBER THEORY; ROM; TABLE LOOKUP;

CHINESE REMAINDER THEOREM; FACTORED DECOMPOSITION; RESIDUE MULTIPLIERS; RESIDUE NUMBER SYSTEM;

MULTIPLYING CIRCUITS;

EID: 0028515598     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.326592     Document Type: Article

References (10)

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9. G. Alia and E. Martinelli, “A VLSI modulo m multiplier,” IEEE Trans. Comput., vol. 40, no. 7, July 1991.
10. K. M. Elleithy and M. A. Bayoumi, “A Θ(log n) algorithm for modulo multiplication,” in Proc. 1990 Asilomar Conf. Circuits, Syst., Comput., Pacific Grove, CA, 1990.